Author : Pooja s. Rade 1
Date of Publication :22nd March 2017
Abstract: The need for high speed digital circuits became more prominent as portable multimedia and communication applications incorporating information processing and computing. In binary number system carry is a major problem in arithmetical operation including propagation delay and circuit complexity. To overcome this problem signed digit is required for carry free arithmetical operation. Further, literature reviews suggest that multi-valued logic (MVL) would be a better choice to address the problem of developing faster chips to perform faster computational operation. Quaternary Signed Digit (QSD) have major advantages in carry free arithmetical operation This paper is about a new number system for ALU. Carry free addition circuit is used to enhance the speed of operation. The design is structured for m × n multiplication where m and n can reach up to 126 bits. In this paper, we are giving the review of papers for the QSD multiplier.
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