Open Access Journal

ISSN : 2456-1304 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Science Engineering and Management (IJSEM)

Monthly Journal for Science Engineering and Management

ISSN : 2456-1304 (Online)

Synthesis of Aho-Corasick Algorithm for Network Processor

Author : Mrs. Neha Jain 1 M.K. Jain 2

Date of Publication :13th December 2017

Abstract: Network processor is an Application Specific Instruction Set Processor for networking application. In this paper we present the hardware implementation of Aho-Corasick algorithm for a network processor. Aho-Corasick algorithm is a pattern searching algorithm. This algorithm can be used to perform ip-lookup, in intrusion detection system etc. Much work has been done in this area, yet there is still a significant space for improvement in efficiency, flexibility, and throughput. In this paper we present the profiling data of software implementation of Aho-Corasick algorithm. After this we present the hardware implementation of the algorithm. In this paper we represent the complete source code. We implement the code using hardware description language like Verilog in Xilinx ISE. Total memory usage of this synthesis is 289108 kilobytes. Total power supply for this synthesis is only 274.02 mW. Only 86 Slice Flip Flops out of 55296 and 257 4 input LUTs out of 55296 are used in the synthesis of Aho-Corasick algorithm. Only 1% Slice Flip Flops and LUTs are used in this synthesis. Thus the device utilization of this implementation is also excellent

Reference :

    1. S.M. Vidanagamachchi, S.D. Dewasurendra, R.G. Ragel,” Hardware software co-design of the AhoCorasick algorithm: Scalable for protein identification 2013 IEEE 8th International Conference on Industrial and Information Systems, ICIIS 2013, pp.321-325, December 2013.
    2. N. I. Rafla, I. Gauba, "A Reconfigurable Pattern Matching Hardware Implement using On-Chip RAMBased FSM," 53rd IEEE International Midwest Symposium on Circuits and Systems, August 2010.
    3. V. Dimopoulos, J. Papaefstathiou, D. Pnevmatikatost ,” A Memory-Efficient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems,” IC-SAMOS-2007, pp. 186-193, August 2007.

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